\doxysubsubsubsection{DMA Data transfer direction }
\hypertarget{group___d_m_a___data__transfer__direction}{}\label{group___d_m_a___data__transfer__direction}\index{DMA Data transfer direction@{DMA Data transfer direction}}


DMA data transfer direction.  


\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_gacb2cbf03ecae6804ae4a6f60a3e37c12}{DMA\+\_\+\+PERIPH\+\_\+\+TO\+\_\+\+MEMORY}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_ga9e76fc559a2d5c766c969e6e921b1ee9}{DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+PERIPH}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadca9547536f3d2f76577275964b4875e}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_ga0695035d725855ccf64d2d8452a33810}{DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+MEMORY}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac52c8d6ecad03bfe531867fa7457f2ae}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+1}})
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}
DMA data transfer direction. 



\label{doc-define-members}
\Hypertarget{group___d_m_a___data__transfer__direction_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___d_m_a___data__transfer__direction_ga0695035d725855ccf64d2d8452a33810}\index{DMA Data transfer direction@{DMA Data transfer direction}!DMA\_MEMORY\_TO\_MEMORY@{DMA\_MEMORY\_TO\_MEMORY}}
\index{DMA\_MEMORY\_TO\_MEMORY@{DMA\_MEMORY\_TO\_MEMORY}!DMA Data transfer direction@{DMA Data transfer direction}}
\doxysubsubsubsubsubsection{\texorpdfstring{DMA\_MEMORY\_TO\_MEMORY}{DMA\_MEMORY\_TO\_MEMORY}}
{\footnotesize\ttfamily \label{group___d_m_a___data__transfer__direction_ga0695035d725855ccf64d2d8452a33810} 
\#define DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+MEMORY~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac52c8d6ecad03bfe531867fa7457f2ae}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+1}})}

Memory to memory direction \Hypertarget{group___d_m_a___data__transfer__direction_ga9e76fc559a2d5c766c969e6e921b1ee9}\index{DMA Data transfer direction@{DMA Data transfer direction}!DMA\_MEMORY\_TO\_PERIPH@{DMA\_MEMORY\_TO\_PERIPH}}
\index{DMA\_MEMORY\_TO\_PERIPH@{DMA\_MEMORY\_TO\_PERIPH}!DMA Data transfer direction@{DMA Data transfer direction}}
\doxysubsubsubsubsubsection{\texorpdfstring{DMA\_MEMORY\_TO\_PERIPH}{DMA\_MEMORY\_TO\_PERIPH}}
{\footnotesize\ttfamily \label{group___d_m_a___data__transfer__direction_ga9e76fc559a2d5c766c969e6e921b1ee9} 
\#define DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+PERIPH~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadca9547536f3d2f76577275964b4875e}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+0}})}

Memory to peripheral direction \Hypertarget{group___d_m_a___data__transfer__direction_gacb2cbf03ecae6804ae4a6f60a3e37c12}\index{DMA Data transfer direction@{DMA Data transfer direction}!DMA\_PERIPH\_TO\_MEMORY@{DMA\_PERIPH\_TO\_MEMORY}}
\index{DMA\_PERIPH\_TO\_MEMORY@{DMA\_PERIPH\_TO\_MEMORY}!DMA Data transfer direction@{DMA Data transfer direction}}
\doxysubsubsubsubsubsection{\texorpdfstring{DMA\_PERIPH\_TO\_MEMORY}{DMA\_PERIPH\_TO\_MEMORY}}
{\footnotesize\ttfamily \label{group___d_m_a___data__transfer__direction_gacb2cbf03ecae6804ae4a6f60a3e37c12} 
\#define DMA\+\_\+\+PERIPH\+\_\+\+TO\+\_\+\+MEMORY~((uint32\+\_\+t)0x00000000U)}

Peripheral to memory direction 